CY7C007A-20JC
SRAM Chip Async Dual 5V 256K-Bit 32K x 8 20ns 68-Pin PLCC
廠商型號:
CY7C007A-20JC
芯天下內部編號:
2-CY7C007A-20JC
生產(chǎn)廠商:
Cypress Semiconductor
描述:
SRAM Chip Async Dual 5V 256K-Bit 32K x 8 20ns 68-Pin PLCC
產(chǎn)品類別:
Memory|RAM|SRAM Chip
客戶編號:
瀏覽次數(shù):
8
所示圖像僅為示意圖。請從產(chǎn)品數(shù)據(jù)表中獲得準確的規(guī)格。
庫存與訂購
產(chǎn)品參數(shù)
| 參數(shù)類型 | 參數(shù)值 |
|---|---|
| Typical Operating Supply Voltage | 5 |
| Standard Package Name | PLCC |
| Maximum Operating Current | 275 |
| Maximum Operating Temperature | 70 |
| Timing Type | Asynchronous |
| Number of Bits per Word | 8 |
| Density | 256K |
| Number of Words | 32K |
| Maximum Access Time | 20 |
| Number of Ports | 2 |
| Maximum Operating Supply Voltage | 5.5 |
| Minimum Operating Temperature | 0 |
| Supplier Package | PLCC |
| Screening Level | Commercial |
| Address Bus Width | 30 |
| Minimum Operating Supply Voltage | 4.5 |
| Pin Count | 68 |
| Lead Shape | J-Lead |
| Address Bus | 15 b |
| Mounting | Surface Mount |
| Operating Temp Range | 0C to 70C |
| Package Type | PLCC |
| Density | 262144 Bit |
| Word Size | 8 b |
| Sync/Async | Asynchronous |
| Operating Temperature Classification | Commercial |
| Clock Freq (Max) | Not Required MHz |
| Architecture | Not Required |
| Rad Hardened | No |
| Operating Supply Voltage (Typ) | 5 V |
| Operating Supply Voltage (Min) | 4.5 V |
| Operating Supply Voltage (Max) | 5.5 V |
| Access Time (Max) | 20ns |
| Supply Current | 275mA |
| Clock Freq | Not Required MHz |
| Access Time | 20ns |
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